AI-Enhanced Design Automation for Next-Gen Electronics Applications and VLSI Systems

Abstract

The extremely high rate of increasing complexity of Very Large Scale Integration (VLSI) systems due to the advent of edge computing, the 6 G communication revolution, as well as the Internet of Things (IoT) devices has revealed the deficiencies of the conventional Electronic Design Automation (EDA) tools. The cost effectiveness of manual intervention, extensive simulations, and iteration based optimization has been progressively falling short of satisfying the tightly constrained requirements of power/area/performance requirements in the next generation electronics applications. In order to meet these challenges, this paper proposes a unified design automation framework where deep reinforcement learning (DRL), graph neural networks (GNNs) and generative modeling approaches are cohesively applied to various phases in the VLSI design flow, that is, logic synthesis, floorplanning, placement and routing and design rule checking. The main goal will be to automate and optimize the process of designing and at the same time lower the turnaround time by a large margin together with enhancing the performance in silicon. The approach entails the training of reinforcement learning agents by multi-objective reward functions to explore trade-offs in the design space between power, delay, and area and GNNs learn complex netlist and layout topology to achieve accurate design representation and generalization across a variety of benchmarks. It was tested on industrial-scale datasets with tools such as OpenROAD, Synopsys Innovus and its results were proven to be highly successful, design turnaround time was decreased by up to 38%, power consumption was decreased by 23%, and post-layout timing closure success rates was increased by 31% Furthermore, they incorporated explainable AI (XAI) modules making the design transparent and interpretable; which relieves human designers in interpreting and trusting the produced results with the AI. Adaptive style of design reuse using learned embeddings is also enabled by the framework in favors of squaring the scale to different technologies and applications. Finally, this study has shown that AI is more of a strategic co-designer rather than a tool in the development of VLSI which can be used to supplement human expertise in the development of the future of electronic design automation of high-performance semiconductor systems.